amcheck: Fix ordering bug in update_cached_xid_range()

The initialization order in update_cached_xid_range() was wrong, calling
FullTransactionIdFromXidAndCtx() before setting
->next_xid. FullTransactionIdFromXidAndCtx() uses ->next_xid.

In most situations this will not cause visible issues, because the next call
to update_cached_xid_range() will use a less wrong ->next_xid. It's rare that
xids advance fast enough for this to be a problem.

Found while adding more asserts to the 64bit xid infrastructure.

Reviewed-by: Mark Dilger 
Discussion: https://postgr.es/m/20230108002923[email protected]
Backpatch: 14-, where heapam verification was introduced

diff --git a/contrib/amcheck/verify_heapam.c b/contrib/amcheck/verify_heapam.c
index 30064d0aba90f9edd5ee5b0d09a741be204c5f14..b237ee9156cfe94f282f7d67e7f335e7c03a097b 100644 (file)
--- a/contrib/amcheck/verify_heapam.c
+++ b/contrib/amcheck/verify_heapam.c
@@ -1578,6 +1578,9 @@ FullTransactionIdFromXidAndCtx(TransactionId xid, const HeapCheckContext *ctx)
 {
    uint32      epoch;
 
+   Assert(TransactionIdIsNormal(ctx->next_xid));
+   Assert(FullTransactionIdIsNormal(ctx->next_fxid));
+
    if (!TransactionIdIsNormal(xid))
        return FullTransactionIdFromEpochAndXid(0, xid);
    epoch = EpochFromFullTransactionId(ctx->next_fxid);
@@ -1599,8 +1602,8 @@ update_cached_xid_range(HeapCheckContext *ctx)
    LWLockRelease(XidGenLock);
 
    /* And compute alternate versions of the same */
-   ctx->oldest_fxid = FullTransactionIdFromXidAndCtx(ctx->oldest_xid, ctx);
    ctx->next_xid = XidFromFullTransactionId(ctx->next_fxid);
+   ctx->oldest_fxid = FullTransactionIdFromXidAndCtx(ctx->oldest_xid, ctx);
 }
 
 /*