Further to commit
92d70b77 , let's drop the code we carry for the
following untested architectures: M68K, M88K, M32R, SuperH. We have no
idea if anything actually works there, and surely as vintage hardware
and microcontrollers they would be underpowered for modern purposes.
We could always consider re-adding SuperH based on evidence of usage and
build farm support, if someone shows up to provide it.
While here, SPARC is usually written in all caps.
Suggested-by: Tom Lane
Reviewed-by: Tom Lane
Reviewed-by: Robert Haas (the idea, not the patch)
Discussion: https://postgr.es/m/959917.
1657522169 %40sss.pgh.pa.us
In general,
PostgreSQL can be expected to work on
- these CPU architectures: x86, PowerPC, S/390, Sparc , ARM, MIPS, RISC-V,
+ these CPU architectures: x86, PowerPC, S/390, SPARC , ARM, MIPS, RISC-V,
and PA-RISC, including
big-endian, little-endian, 32-bit, and 64-bit variants where applicable.
- Code support exists for M68K, M88K, M32R, and SuperH, but these
- architectures are not known to have been tested recently. It is often
+ It is often
possible to build on an unsupported CPU type by configuring with
--disable-spinlocks , but performance will be poor.
}
-/*
- * Various TAS implementations that cannot live in s_lock.h as no inline
- * definition exists (yet).
- * In the future, get rid of tas.[cso] and fold it into this file.
- *
- * If you change something here, you will likely need to modify s_lock.h too,
- * because the definitions for these are split between this file and s_lock.h.
- */
-
-
-#ifdef HAVE_SPINLOCKS /* skip spinlocks if requested */
-
-
-#if defined(__GNUC__)
-
-/*
- * All the gcc flavors that are not inlined
- */
-
-
-/*
- * Note: all the if-tests here probably ought to be testing gcc version
- * rather than platform, but I don't have adequate info to know what to
- * write. Ideally we'd flush all this in favor of the inline version.
- */
-#if defined(__m68k__) && !defined(__linux__)
-/* really means: extern int tas(slock_t* **lock); */
-static void
-tas_dummy()
-{
- __asm__ __volatile__(
-#if (defined(__NetBSD__) || defined(__OpenBSD__)) && defined(__ELF__)
-/* no underscore for label and % for registers */
- "\
-.global tas \n\
-tas: \n\
- movel %sp@(0x4),%a0 \n\
- tas %a0@ \n\
- beq _success \n\
- moveq #-128,%d0 \n\
- rts \n\
-_success: \n\
- moveq #0,%d0 \n\
- rts \n"
-#else
- "\
-.global _tas \n\
-_tas: \n\
- movel sp@(0x4),a0 \n\
- tas a0@ \n\
- beq _success \n\
- moveq #-128,d0 \n\
- rts \n\
-_success: \n\
- moveq #0,d0 \n\
- rts \n"
-#endif /* (__NetBSD__ || __OpenBSD__) && __ELF__ */
- );
-}
-#endif /* __m68k__ && !__linux__ */
-#endif /* not __GNUC__ */
-#endif /* HAVE_SPINLOCKS */
-
-
-
/*****************************************************************************/
#if defined(S_LOCK_TEST)
#endif /* powerpc */
-/* Linux Motorola 68k */
-#if (defined(__mc68000__) || defined(__m68k__)) && defined(__linux__)
-#define HAS_TEST_AND_SET
-
-typedef unsigned char slock_t;
-
-#define TAS(lock) tas(lock)
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- register int rv;
-
- __asm__ __volatile__(
- " clrl %0 \n"
- " tas %1 \n"
- " sne %0 \n"
-: "=d"(rv), "+m"(*lock)
-: /* no inputs */
-: "memory", "cc");
- return rv;
-}
-
-#endif /* (__mc68000__ || __m68k__) && __linux__ */
-
-
-/* Motorola 88k */
-#if defined(__m88k__)
-#define HAS_TEST_AND_SET
-
-typedef unsigned int slock_t;
-
-#define TAS(lock) tas(lock)
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- register slock_t _res = 1;
-
- __asm__ __volatile__(
- " xmem %0, %2, %%r0 \n"
-: "+r"(_res), "+m"(*lock)
-: "r"(lock)
-: "memory");
- return (int) _res;
-}
-
-#endif /* __m88k__ */
-
-
#if defined(__mips__) && !defined(__sgi) /* non-SGI MIPS */
#define HAS_TEST_AND_SET
#endif /* __mips__ && !__sgi */
-#if defined(__m32r__) && defined(HAVE_SYS_TAS_H) /* Renesas' M32R */
-#define HAS_TEST_AND_SET
-
-#include
-
-typedef int slock_t;
-
-#define TAS(lock) tas(lock)
-
-#endif /* __m32r__ */
-
-
-#if defined(__sh__) /* Renesas' SuperH */
-#define HAS_TEST_AND_SET
-
-typedef unsigned char slock_t;
-
-#define TAS(lock) tas(lock)
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- register int _res;
-
- /*
- * This asm is coded as if %0 could be any register, but actually SuperH
- * restricts the target of xor-immediate to be R0. That's handled by
- * the "z" constraint on _res.
- */
- __asm__ __volatile__(
- " tas.b @%2 \n"
- " movt %0 \n"
- " xor #1,%0 \n"
-: "=z"(_res), "+m"(*lock)
-: "r"(lock)
-: "memory", "t");
- return _res;
-}
-
-#endif /* __sh__ */
-
-
-/* These live in s_lock.c, but only for gcc */
-
-
-#if defined(__m68k__) && !defined(__linux__) /* non-Linux Motorola 68k */
-#define HAS_TEST_AND_SET
-
-typedef unsigned char slock_t;
-#endif
-
-
#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
/*
* HP's PA-RISC
projects / postgresql.git / commitdiff